PCB design and firmware development are usually treated as consecutive phases: the board is designed, then the firmware is written for it. In practice they constrain each other continuously, and the cost of discovering a conflict late is a board respin.
Pin assignment is a system decision
A pin that is convenient for layout may be a pin without the peripheral function the firmware needs. Before layout begins, agree the pin map against the MCU datasheet: which pins need alternate functions, which need interrupts, which are used for debug and which must remain free for a future feature.
Leave test points and a debug header on the board. Removing them saves a few square millimetres and costs far more in bring-up time.
Power sequencing and reset behaviour
Firmware assumes a power sequence. If the board brings up a radio before the MCU is stable, or if a peripheral is powered from a rail that rises after the MCU boots, the firmware must know. Document the expected sequence and verify it on the first prototype with a scope, not by observing that the device eventually works.
The same applies to reset. A watchdog that resets the MCU without resetting the radio can leave the system in a state that looks like a firmware bug and is actually a hardware design issue.
Debug access must survive layout
SWD or JTAG pins, a UART console and a way to force boot mode are not optional on a product that will be diagnosed in the field or on the production line. Route them to a connector or pads that remain accessible after assembly.
If the enclosure will be sealed, decide now how a unit can be recovered if an update fails. A bootloader entry method that requires opening the product is a support cost for its entire life.
Layout choices that firmware cannot fix
- An antenna keep-out area that is violated by a ground pour or a battery.
- A crystal placed with long traces or near a switching regulator.
- Analog sensor traces routed beside a high-current motor driver.
- Insufficient bulk capacitance on a radio supply, causing brown-out during transmit bursts.
- A ground plane split that forces return currents under sensitive signals.
Agree the interface, then work in parallel
Once the pin map, power sequence, debug access and timing budget are agreed in writing, hardware and firmware can proceed in parallel with confidence. The document is short — one page is usually enough — and it prevents the most common cause of late-stage rework.
Related engineering
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